1. Field of the Invention
The present invention relates to data storage devices. More particularly, the present invention relates to rotating magnetic disk data storage devices.
2. Description of the Prior Art and Related Information
Rotating magnetic disk data storage devices, or "disk drives," are a key component in a majority of computer systems. This is due to their capability of providing reliable permanent data storage, along with rapid access to the data stored on the magnetic disks. A key requirement of data storage systems is the reliability of the stored and retrieved data provided to the host. Data read from the data storage disks may have errors therein for a variety of reasons. For example, physical defects on the disk surface, noise in the read channel, track centerline offset, temperature variations and the effects of certain patterns will cause occasional errors in the reading of data. Furthermore, the manner in which data is encoded before being written on the disk can cause a single bit error to propagate to form an error "burst". In order to prevent sending bad data to the host, and to obtain a cost effective design with high reliability and data integrity, most disk drives employ some type of error detection and correction system.
The speed of the disk drive is a key measure of the performance of the storage system. The speed of the disk drive is measured both by access time, i.e., the time to access and retrieve a given block of data, and the speed at which the data can be transferred to the host (i.e. throughput). The time required to detect and to correct errors can directly impact both the access time and the throughput of the disk drive.
For example, to allow error detection and immediate correction without affecting disk drive access time, the error correction circuitry must be able to complete the correction "on-the-fly". In other words, the error detection and correction circuitry must detect and correct errors without incurring significant disk rotational latency. Alternatively, error correction may be performed after multiple sectors are read on-the-fly into a buffer memory without correction. Such an "off-line" correction approach will impact throughput to the host, however, as the corrections are done on the buffered read data.
At the same time, as capacity and hence bit densities on the disks increase, the error tolerance requirements increase. For example, older systems with lower bit densities only needed to perform error correction at the rate of one error every 10.sup.10 bits or, at most, one error every 10.sup.8 bits. Disk drives having increased bit densities and complex data patterns may have to accommodate much higher error rates, e.g., one error every 10.sup.6 or 10.sup.5 bits. Such error rates result in multiple errors in a single sector being a likely occurrence. Also single or multiple errors in consecutive sectors becomes a more likely occurrence.
In order to perform error detection and correction on-the-fly and accommodate back-to-back sector errors, the error correction system has one sector time to detect errors and one sector time to correct them. Otherwise the data read operation must be halted for a disk revolution to allow the correction circuitry to catch up.
In order to improve end user data integrity while the read bit error rate rises, increasingly robust error detection and correction circuitry has been developed. For example, many error correcting circuits now employ complex error correction codes to perform error detection and correction instead of a simpler cyclic redundancy check code. Such increasingly robust codes can impose significant overhead in terms of disk drive performance, however.
Most error detection and correction systems employed in disk drives are based upon well known algebraic based codes such as the Reed-Solomon code. During a disk write operation user data is typically processed by a binary error detection code (EDC). The user data is also processed by an error correction code (ECC). The resulting data including user data, error detection and error correction check symbols form a codeword. The codeword is written onto the disk during a disk write operation.
During the disk read operation, the codeword is read from the disk. A syndrome generator is used to generate ECC syndromes and EDC syndromes from the codeword. A number of approaches have been implemented to analyze the syndrome to provide error detection and correction.
One approach to error correction uses a burst trapping algorithm (Meggitt decoder). In this method, the error corrector uses the composite syndrome generated by the syndrome generator. The composite syndrome is shifted through the inverse of the ECC generator polynomial until a correctable pattern is detected. The number of shifts needed to determine the correctable pattern supplies the location of the error. The magnitude of each error at each location is also calculated by the error corrector. While this approach may operate on-the-fly it is presently limited to correcting a single error "burst" per sector, even if the error correction code is capable of correcting more than one error.
Once the error corrector has calculated the error location and magnitude, the error corrector returns the corrected codeword to the syndrome generator for validation. The syndrome generator generates syndromes based on the corrected codeword. If the resulting syndromes equal zero, the error locations and magnitudes calculated by the error corrector are valid. This approach requires the syndrome generator to generate a minimum of two syndromes, one for the codeword and one for the corrected codeword. This delays syndrome generation and error correction for every codeword containing a detected error.
In a second approach, which may be combined with burst trapping, "heroic" error correction is performed by the disk drive microprocessor. That is, the microprocessor implements a complex algorithm on the data having a detected error. This approach is relatively slow since the microprocessor must be accessed each time an error is detected. Therefore, such approach cannot presently provide full error correction on-the-fly and data throughput to the host is negatively impacted.
In an alternate approach, a finite field processor has been proposed to perform Galois Field mathematical operations for error correction. This approach is set out in Glover and Dudley; Practical Error Correction Design for Engineers, 1988. However, this implementation requires multiple steps to complete each finite field multiplication calculation. Specifically, each such calculation requires a logarithm ROM table look-up operation, a binary addition and an anti-log table look-up operation. This multiple step approach requires significant time and is therefore undesirable for correcting errors on-the-fly.
Such error correction and detection prior art systems thus have disadvantages related to the number of bursts that can be corrected and/or the speed at which the errors can be corrected.
Accordingly, it will be appreciated that a need presently exists for a disk drive employing an improved error correction and detection system to allow increased bit density and capacity while maintaining or increasing data reliability. It will further be appreciated that a need presently exists for a disk drive which can correct errors in read data without incurring significant disk rotational latency and which can provide error corrected data to a host system at high data transfer rates.